교수소개
조교수
2020.05.09 Purdue University - West Lafayette (박사)
2009.02.26 서울대학교 (석사)
2007.02.02 한국과학기술원 (학사)
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Logic Operation Implementation Method with Single-Level Cell NAND Flash, IDEC Journal of Integrated Circuits and Systems , 제10권(집) , 제1호 , PP.1~4 , 2024.01.01
Design of a 180 nm CMOS Neuron Circuit with Soft-Reset and Underflow Allowing for Loss-Less Hardware Spiking Neural Networks, Advanced Intelligent Systems , 제6권(집) , 제1호 , 2024.01.01
Improved Resistive Switching Characteristics and Synaptic Functions of InZnO/SiO2 Bilayer Device, Materials , 제16권(집) , 제23호 , 2023.11.28
NOR-Type 3-D Synapse Array Architecture Based on Charge-Trap Flash Memory, IEEE Journal of the Electron Devices Society , 제10권(집) , PP.813~820 , 2022.09.21
Ferroelectric FET Based Coupled-Oscillatory Network for Edge Detection, IEEE ELECTRON DEVICE LETTERS , 제42권(집) , 제11호 , PP.1670~1673 , 2021.11.01
IMPULSE: A 65-nm Digital Compute-in-Memory Macro With Fused Weights and Membrane Potential for Spike-Based Sequential Learning Tasks, IEEE Solid-State Circuits Letters , 제4권(집) , PP.137~140 , 2021.06.28
Revisiting Stochastic Computing in the Era of Nanoscale Nonvolatile Technologies, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS , 제28권(집) , 제12호 , PP.2481~2494 , 2020.12.01
Distance Computation Based on Coupled Spin-Torque Oscillators: Application to Image Processing, Physical Review Applied , 제14권(집) , 제3호 , 2020.09.01
sBSNN: Stochastic-Bits Enabled Binary Spiking Neural Network With On-Chip Learning for Energy Efficient Neuromorphic Computing at the Edge, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS , 제67권(집) , 제8호 , PP.2546~2555 , 2020.08.01
Powerline Communication for Enhanced Connectivity in Neuromorphic Systems, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS , 제27권(집) , 제8호 , PP.1897~1906 , 2019.08.01